1. Field
The following description relates to a processor capable of supporting single instruction multiple data (SIMD) mode and multiple instruction multiple data (MIMD) mode, and a method of supporting multi-mode functioning in the processor.
2. Description of Related Art
A processor based on a single instruction multiple data (SIMD) structure enables all of the processing elements included in the processor to share a common instruction by means of a single front end unit that fetches and decode the instruction, thereby reducing requirements for hardware resources and increasing the performance of parallel data processing by managing simultaneous instruction execution. In a processor that uses an SIMD structure, when the processor handles conditional branches, each conditional branch is sequentially executed, which hampers the efficient use of resources. However, the SIMD structure requires that conditional branches be sequentially executed. Since there is only a single front end unit, an SIMD structure requires that situations where code leads to thread divergence be resolved sequentially, as the SIMD structure causes the threads to be interdependent. Thus, a SIMD structure is able to reduce processor complexity in that an SIMD structure only requires a single front end unit, but thread divergence causes problems in an SIMD environment.
Alternatively, a processor based on a multiple instruction multiple data (MIMD) structure enables all processing elements to concurrently process individual threads using different front end units. An MIMD structure achieves fast operation processing during thread divergence and is thus considered as being suitable to process conditional branches. However, providing the individual front end units of a processor that uses an MIMD structure complicates the hardware design and increases the size of the processor, which also increases a manufacturing cost. Additionally, a processor with a fixed MIMD structure requires that the processor be built to provide a plurality of front end units even when not all of the front end units are actually being used.